In recent years, with the development of electronic devices, in addition to an improvement of performance of electronic parts, the demand of reductions in size and weight of the electronic parts becomes strict. In particular, in a mobile electronic device typified by a mobile phone, the demand is remarkable in pursuit of the convenience. Against such a background, a multilayer wiring board has been used to efficiently mount a semiconductor chip or a passive device. Up to now, high-density wiring such as reduction in wiring line width is mainstream. However, in order to reduce the number of parts to be mounted, passive parts typified by capacitors are required to be built in the wiring board.
As a technique that builds a capacitor in a multilayer wiring board, a technique that calcines a high-dielectric constant inorganic material to form a dielectric layer, a technique (for example, U.S. Pat. No. 5,162,977) that composites a high-dielectric inorganic material and a resin material to form a dielectric layer, a technique that forms a thin dielectric layer by using a process such as a sputtering process, and the like have been known.
The technique that calcines a high-dielectric inorganic material to form a dielectric layer includes an example in which a high-dielectric material suitable for simultaneous calcination of a high-dielectric material and a substrate insulating material is used (see Japanese Patent Publication No. 5-55079 and Journal of Japanese Institute of Electronics Packaging, Vol. 4, No. 2, pp. 145 to 149). The technique that forms a thin dielectric layer includes an example in which a capacitor is built in a resin substrate by applying a semiconductor sputter technique (see Journal of Japanese Institute of Electronics Packaging, Vol. 4, No. 7, pp. 590 to 596).
Since a multilayer wiring board using a technique that composites a high-dielectric inorganic material and a resin material to form a dielectric layer does not include a high-temperature calcining step and a sputter step, the multilayer wiring board is economically excellent. Composite materials consisting of a large number of high-dielectric inorganic materials and a large number of resins are proposed to be applied to multilayer wiring boards using resins (for example, see Journal of Materials Science: Materials in Electronics, Vol. 11, pp. 253 to 268). Methods of manufacturing capacitors in multilayer wiring boards change depending on compositions of materials to be used. The methods include a manufacturing method of a conventional multilayer wiring board (see Embedded Decoupling Capacitance Project Final Report 3-1 to 6 (National Center for Manufacturing Sciences)) and a manufacturing method of a multilayer wiring board using a high-dielectric material having photosensitivity (see “Integration of Thin Film Passive Circuits Using High/Low Dielectric Constant Materials”, Electronic Components and Technology Conference (1997), pp. 739 to 744).
In a multilayer wiring board in which a capacitor using a resin composite material obtained by filling a high-dielectric filler as a high-dielectric material is built, when capacitors are laminated as core layers and symmetrically arranged, both the surfaces of each core layer must be patterned. However, since the capacitor using the resin composite material easily causes problems in breaking strength and processibility, both the sides of the core layer must be independently patterned and laminated to make the cost higher than that in manufacturing of a conventional multilayer wiring board. In addition, in the multilayer wiring board, when an insulating layer is used as a core layer, high-dielectric material layers which are symmetrically laminated with reference to the core layer are slightly warped. However, the high-dielectric material layers which are asymmetrically laminated are greatly warped. More specifically, it is very difficult to arrange a capacitor in an arbitrary layer except for a core layer to obtain a multilayer wiring board with a small warpage. Therefore, in a conventional technique, in order to solve the problem, capacitors must be symmetrically arranged with reference to a core layer to reduce the warpage of a wiring board.
However, a method that symmetrically arranges and laminates capacitors consisting of an expensive material to reduce warpage excessively requires capacitors is not economically good. Furthermore, the degree of freedom of design of a multilayer wiring board is limited.
A capacitance which is an important characteristic of a capacitor is in proportion to a specific inductive capacity, and is in inverse proportion to the thickness of a dielectric substance. More specifically, in order to increase the capacitance of the capacitor without changing the material, the thickness of the high-dielectric material must be reduced. In the conventional method described in the above documents, a high-dielectric material is decreased in thickness to deteriorate the handling properties of the material, a high manufacturing yield cannot be achieved. In addition, like a copper foil with adhesive agent serving as a built-up substrate material, a material obtained by casting a high-dielectric material onto a copper foil may also be known. However, the filling properties and the thickness control of an internal layer circuit pattern are posed as problems when the internal layer pattern is laminated and integrated with an internal circuit substrate.
A capacitance serving as an important characteristics of a capacitor is also in proportion to the area of a counter electrode of the capacitor. More specifically, the fluctuation in area of the counter electrode must be reduced to suppress the fluctuation of capacitance in manufacturing. However, in formation of a capacitor electrode opposing an insulating layer containing a high-dielectric material, when a method that etches a metal foil covering the insulating layer in the form of a desired pattern to form a capacitor electrode opposing an electrode formed in advance is used, the area of the counter electrode of the capacitor changes depending on the fluctuation of etching of the metal foil to fluctuate the capacitance of the capacitor. The fluctuation in capacitance of the capacitor caused by a shift of the counter electrode is also posed as a problem.
Furthermore, in a multilayer wiring board for a high-frequency circuit on which a large number of passive devices are mounted, a technique that efficiently builds inductors as passive devices except for capacitors in a substrate is also required. In the multilayer wiring board for a high-frequency circuit, a transmission loss is also required to be reduced.